Programming SGI® RASC™ Systems with Handel-C™ and DK
Length: 4 Days - Current Schedule  |  Price: $2000 - Payment Info

This training course combines practical exercises with a structured lecture series. By the end of the course, you will be able to create versatile, high-performance designs using Handel-C with DK.

The first half of the course concentrates on learning the language and the basics of DK. On the first day, you will learn the building blocks of the Handel-C language. You will simulate a simple design and then download it to an FPGA running on a real hardware platform. On the second day, you will learn about further features in DK3 and implement some graphical applications, first simulating them and then running them in an FPGA.

The second half of the course covers advanced topics on how DK produces hardware output from your source code, how to pipeline a design, how to optimize your code, how to debug for area and delay, and how to take advantage of the powerful retiming feature in DK3. During the exercises for these two days, you will create a fully pipelined design and get it to run as fast as possible, learning how to use the FPGA vendor's place and route and timing analysis software along the way.

An integral part of this course is instruction in the optimum tool flow using the DK Design Suite that software engineers can use to develop and verify algorithms targeting SGI products incorporating RASC technology. The use of DK expands the user base of the RASC technology by providing customers an optimum tool flow from algorithmic C code to the RASC FPGAs.

Topics Covered

  • Handel-C Building Blocks
  • DK Basics
  • Handel-C Operators
  • DK Options
  • Talking to the Outside World
  • Bulk Storage and Further Control Statements
  • Further Handel-C Types
  • Advanced Types
  • Functions and Macros
  • Flexible Code
  • Mapping Handel-C to an FPGA
  • Handel-C to Logic
  • Pipelining Your design
  • Priming and Synchronizing the Pipeline
  • Efficient Handel-C
  • Debugging Area and Delay
  • DK Optimizations
  • Clocks and Interfaces
  • Retiming and ALU Mapping
  • Advanced DK

Prerequisites

Some experience of C programming or FPGA design will be an advantage; however, neither is a prerequisite. The course starts with the building blocks of the language and discusses the basics of FPGA design along the way.